Phase selector capable of tolerating jitter and method thereof, and clock and data recovery circuit

Abstract

A phase selector capable of tolerating jitters is applied in a clock and data recovery circuit. The phase selector includes a comparing module, a weighting circuit, and a predictor. The comparing module compares a phase-detecting signal and a phase-selecting signal corresponding to the last cycle so as to generate an error signal. The weighting circuit calculates a weighting error signal according to the error signal and a weighting parameter. The phase predictor compares the weighting error signal and predetermined threshold values so as to generate the phase-selecting signal corresponding to the present cycle. When the received input data stream of the clock and data recovery circuit has a small jitter, the phase selector rapidly locks the phase so as to generate the correct phase-selecting signal. When the received input data stream of the clock and data recovery circuit has a large jitter, the phase selector stably generates the phase-selecting signal.