The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2013

Filed:

Nov. 10, 2010
Applicants:

Yuki Teramoto, Tokyo, JP;

Yoshinori Haraguchi, Tokyo, JP;

Inventors:

Yuki Teramoto, Tokyo, JP;

Yoshinori Haraguchi, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes a multiplexer and an output buffer. The multiplexer includes: n switches (n is an integer of 2 or greater) each including an input node receiving a different data signal and an output node coupled to an input node of the output buffer; and a plurality of switch control circuits each corresponding to a respective one of the n switches. Each of the plurality of switch control circuits turns on a corresponding one of the n switches based on a corresponding one of the signals each having a first cycle and a phase different by 1/n of the cycle from adjacent phases. When each of the plurality of switch control circuits detects that an input-side data signal of the corresponding one of the n switches appears at a corresponding output-side node, each of the plurality of switch control circuits turns off the corresponding switch. The multiplexer converts data, which is inputted in parallel to the n switches and which changes in the first cycle, into serial data that changes in 1/n of the first cycle and outputs the serial data via the output buffer.


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