The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8581624 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 12, 2013

Filed:

Mar. 29, 2012
Applicants:

David Cashman, Toronto, CA;

David Lewis, Toronto, CA;

Valavan Manohararajah, Scarborough, CA;

Inventors:

David Cashman, Toronto, CA;

David Lewis, Toronto, CA;

Valavan Manohararajah, Scarborough, CA;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
Abstract

A programmable logic region on a programmable integrated circuit may include a first set of look-up tables that receive programmable logic region input signals and a second set of look-up tables that produce programmable logic region output signals. Multiplexer circuitry may be interposed between the first and second sets of look-up tables. The multiplexer circuitry may receive the programmable logic region input signals in parallel with the output signals from the first set of look-up tables and may provide corresponding selected signals to the second set of look-up tables. The programmable logic region input signals may be shared by the first and second sets of look-up tables. Logic circuitry may be coupled to outputs of the first and second sets of look-up tables. The logic circuitry may be configured to logically combine output signals from the first and second sets of look-up tables.


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