The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2013
Filed:
Dec. 22, 2010
Shinnosuke Maeda, Nagoya, JP;
Tetsuo Suzuki, Niwa-gun, JP;
Atsuhiko Sugimoto, Kagamigahara, JP;
Tatsuya Ito, Kagamigahara, JP;
Takuya Hando, Inuyama, JP;
Satoshi Hirano, Chita-gun, JP;
Shinnosuke Maeda, Nagoya, JP;
Tetsuo Suzuki, Niwa-gun, JP;
Atsuhiko Sugimoto, Kagamigahara, JP;
Tatsuya Ito, Kagamigahara, JP;
Takuya Hando, Inuyama, JP;
Satoshi Hirano, Chita-gun, JP;
NGK Spark Plug Co., Ltd, Nagoya, JP;
Abstract
A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.