Semiconductor device with increased i/o leadframe including power bars

Abstract

A semiconductor device or semiconductor package (e.g., a QFP package) including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor package, and further to provide one or more power bars in the semiconductor package. More particularly, the semiconductor package of the present invention includes a generally planar die paddle or die pad defining multiple peripheral edge segments. In addition, the semiconductor package includes a plurality of leads. Some of these leads include exposed bottom surface portions which are provided in at least two concentric rows or rings which at least partially circumvent the die pad, with other leads including portions which protrude from respective side surfaces of a package body of the semiconductor package. Connected to the top surface of the die pad is at least one semiconductor die which is electrically connected to at least some of the leads. At least portions of the die pad, the power bars, leads, and the semiconductor die are encapsulated by the package body, with at least portions of the bottom surfaces of the die pad and some of the leads being exposed in a common exterior surface of the package body. The bottom surface(s) of the power bar(s) may also be exposed in such common exterior surface of the package body, or the power bar(s) may be completely covered by the package body.