The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2013
Filed:
Apr. 11, 2005
Adam William Saxler, Durham, NC (US);
Yifeng Wu, Goleta, CA (US);
Primit Parikh, Goleta, CA (US);
Umesh Mishra, Montecito, CA (US);
Richard Peter Smith, Carrboro, NC (US);
Scott T. Sheppard, Chapel Hill, NC (US);
Adam William Saxler, Durham, NC (US);
Yifeng Wu, Goleta, CA (US);
Primit Parikh, Goleta, CA (US);
Umesh Mishra, Montecito, CA (US);
Richard Peter Smith, Carrboro, NC (US);
Scott T. Sheppard, Chapel Hill, NC (US);
Cree, Inc., Durham, NC (US);
Abstract
Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.