The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2013
Filed:
Mar. 19, 2010
Chen-yong Cher, Port Chester, NY (US);
Paul W. Coteus, Yorktown Heights, NY (US);
Alan Gara, Mount Kisco, NY (US);
Eren Kursun, Ossining, NY (US);
David P. Paulsen, Dodge Center, MN (US);
Brian A. Schuelke, Rochester, MN (US);
John E. Sheets, Ii, Zumbrota, MN (US);
Shurong Tian, Mount Kisco, NY (US);
Chen-Yong Cher, Port Chester, NY (US);
Paul W. Coteus, Yorktown Heights, NY (US);
Alan Gara, Mount Kisco, NY (US);
Eren Kursun, Ossining, NY (US);
David P. Paulsen, Dodge Center, MN (US);
Brian A. Schuelke, Rochester, MN (US);
John E. Sheets, II, Zumbrota, MN (US);
Shurong Tian, Mount Kisco, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A processor-implemented method for improving efficiency of a static core turn-off in a multi-core processor with variation, the method comprising: conducting via a simulation a turn-off analysis of the multi-core processor at the multi-core processor's design stage, wherein the turn-off analysis of the multi-core processor at the multi-core processor's design stage includes a first output corresponding to a first multi-core processor core to turn off; conducting a turn-off analysis of the multi-core processor at the multi-core processor's testing stage, wherein the turn-off analysis of the multi-core processor at the multi-core processor's testing stage includes a second output corresponding to a second multi-core processor core to turn off; comparing the first output and the second output to determine if the first output is referring to the same core to turn off as the second output; outputting a third output corresponding to the first multi-core processor core if the first output and the second output are both referring to the same core to turn off.