The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2013
Filed:
Apr. 19, 2012
Applicants:
Mounir Zid, Ariana, TN;
Alberto Scandurra, Messina, IT;
Inventors:
Mounir Zid, Ariana, TN;
Alberto Scandurra, Messina, IT;
Assignees:
STMicroelectronics S.A., Montrouge, FR;
STMicroelectronics S.r.l., Agrate Brianza (Milano), IT;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/096 (2006.01); H04L 27/08 (2006.01);
U.S. Cl.
CPC ...
Abstract
A clock gate includes a first Muller gate that receives at its inputs a clock signal and an enable signal. The output of the first Muller gate is applied, with a delayed version of the clock signal, to a second Muller gate. A logic circuit operates to logically combine the output of the second Muller gate with a delayed version of the clock signal. The output of the logic circuit provides a gated clock output.