The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8569874 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 29, 2013

Filed:

Mar. 09, 2011
Applicants:

Evan G. Colgan, Chestnut Ridge, NY (US);

Monty M. Denneau, Puddingdale, NY (US);

Sampath Purushothaman, Yorktown Heights, NY (US);

Klmberley A. Kelly, Pleasant Valley, NY (US);

Roy R. Yu, Poughkeepsie, NY (US);

Inventors:

Evan G. Colgan, Chestnut Ridge, NY (US);

Monty M. Denneau, Puddingdale, NY (US);

Sampath Purushothaman, Yorktown Heights, NY (US);

Klmberley A. Kelly, Pleasant Valley, NY (US);

Roy R. Yu, Poughkeepsie, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 23/64 (2006.01);
U.S. Cl.
CPC ...
Abstract

A chip stack structure includes a logic chip having an active device surface, and memory slices of a memory unit vertically aligned such that a surface of the memory slices is oriented perpendicular to the active device surface of the logic chip. The chip stack structure also includes wiring patterned on an upper surface of the memory slices, the wiring electrically connecting memory leads of the memory slices to logic grids corresponding to logic grid connections of the logic chip.


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Colgan, Evan. (2013). High memory density, high input/output bandwidth logic-memory structure and architecture (U.S. Patent No. 8569874). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8569874

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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