The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2013
Filed:
Apr. 01, 2011
Wing K. Yu, Chandler, AZ (US);
Wing K. Yu, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Digitally controllable delay lines including fine grain and coarse grain delay elements, and methods and system to calibrate the delay lines in fine grain increments. Calibration may include calibrating a number of fine grain elements for which a combined delay is substantially equal to a delay of a coarse grain element, and calibrating numbers of fine grain and coarse grain elements which a combined delay corresponds to a period of a reference clock. A digitally controlled delay line may be implemented as part of a digital delay locked loop (DLL), and calibration parameters may be provided to a slave DLL having a similarly implemented delay line. A digitally controllable DLL may provide relatively low-power, high-resolution over a spectrum of process, voltage, and temperature variations, and may be implemented in relatively high-speed applications previously reserved for analog DLLs.