The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2013

Filed:

Nov. 09, 2011
Applicants:

Ming-zhang Kuo, Xigang Shiang, TW;

Jen-hang Yang, Yonghe, TW;

Shang-chih Hsieh, Yangmei, TW;

Chih-chiang Chang, Zhudong Township, Hsinchu County, TW;

Osamu Takahashi, Round Rock, TX (US);

Ta-pen Guo, Cupertino, CA (US);

Sang Hoo Dong, Hsin-Chu, TW;

Inventors:

Ming-Zhang Kuo, Xigang Shiang, TW;

Jen-Hang Yang, Yonghe, TW;

Shang-Chih Hsieh, Yangmei, TW;

Chih-Chiang Chang, Zhudong Township, Hsinchu County, TW;

Osamu Takahashi, Round Rock, TX (US);

Ta-Pen Guo, Cupertino, CA (US);

Sang Hoo Dong, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit includes a logic gate and a latch. The logic gate is configured to receive a clock signal at a first input. The latch is disposed in a feedback loop of the logic gate and is configured to output a feedback signal to a second input of the logic gate in response to a signal output by the logic gate and the clock signal. The circuit is configured to output a pulsed signal based on one of a rising edge or a falling edge of the clock signal.


Find Patent Forward Citations

Loading…