The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2013
Filed:
May. 04, 2011
Seung-won Lim, Gyeonggi-do, KR;
O-soeb Jeon, Seoul, KR;
Joon-seo Son, Seoul, KR;
Byoung-ok Lee, Gyeonggi-do, KR;
Man-kyo Jong, Gyeonggi-do, KR;
Seung-won Lim, Gyeonggi-do, KR;
O-soeb Jeon, Seoul, KR;
Joon-seo Son, Seoul, KR;
Byoung-ok Lee, Gyeonggi-do, KR;
Man-kyo Jong, Gyeonggi-do, KR;
Fairchild Korea Semiconductor, Ltd., Wonmi-District, Bucheon, Kyonggi Province, KR;
Abstract
Provided are power device packages, which include thermal electric modules using the Peltier effect and thus can improve operational reliability by rapidly dissipating heat generated during operation to the outside, and methods of fabricating the same. An exemplary power device package includes: a thermal electric module having a first surface and a second surface opposite each other, and a plurality of n-type impurity elements and a plurality of p-type impurity elements alternately and electrically connected to each other in series; a lead frame attached to the first surface of the thermal electric module by an adhesive member; at least one power semiconductor chip and at least one control semiconductor chip, each chip being mounted on and electrically connected to the lead frame; and a sealing member sealing the thermal electric module, the chips, and at least a portion of the lead frame, but exposing the second surface of the module.