The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2013
Filed:
Aug. 29, 2008
Applicants:
Ahmed Shahid, San Jose, CA (US);
Kaushik Kuila, San Jose, CA (US);
David T. Hass, Santa Clara, CA (US);
Inventors:
Ahmed Shahid, San Jose, CA (US);
Kaushik Kuila, San Jose, CA (US);
David T. Hass, Santa Clara, CA (US);
Assignee:
NetLogic Microsystems, Inc., Irvine, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A system and method are provided for reducing a latency associated with timestamps in a multi-core, multi threaded processor. A processor capable of simultaneously processing a plurality of threads is provided. The processor includes a plurality of cores, a plurality of network interfaces for network communication, and a timer circuit for reducing a latency associated with timestamps used for synchronization of the network communication utilizing a precision time protocol.