The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2013

Filed:

Aug. 08, 2007
Applicants:

Osamu Yamazaki, Tokyo, JP;

Isao Ichikawa, Tokyo, JP;

Naoya Saiki, Tokyo, JP;

Inventors:

Osamu Yamazaki, Tokyo, JP;

Isao Ichikawa, Tokyo, JP;

Naoya Saiki, Tokyo, JP;

Assignee:

Lintec Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B29C 65/00 (2006.01); C09J 5/02 (2006.01); B32B 37/00 (2006.01); C08J 5/00 (2006.01); H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a process for manufacturing a semiconductor device comprising heating a wiring board on which a chip and an uncured adhesive layer are laminated for curing the adhesive layer, the improvement includes performing a statically pressurizing step before the adhesive layer is cured, in which step the wiring board on which the chip and the uncured adhesive layer are laminated is subjected to a static pressure greater than atmospheric pressure by not less than 0.05 MPa. According to the process, voids are easily eliminated irrespective of the design of the wiring board, and the adhesive is prevented from curling up on the chip.


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