The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2013
Filed:
Dec. 30, 2010
John T. Andrews, Eagle Mountain, UT (US);
Hamza Yilmaz, Saratoga, CA (US);
Bruce Marchant, Murray, UT (US);
Ihsiu Ho, Salt Lake City, UT (US);
John T. Andrews, Eagle Mountain, UT (US);
Hamza Yilmaz, Saratoga, CA (US);
Bruce Marchant, Murray, UT (US);
Ihsiu Ho, Salt Lake City, UT (US);
Fairchild Semiconductor Corporation, South Portland, ME (US);
Abstract
A process for forming a vertically conducting semiconductor device includes providing a semiconductor substrate having a topside surface and a backside surface. The semiconductor substrate serves as a terminal of the vertically conducting device for biasing the vertically conducting device during operation. The process also includes forming an epitaxial layer extending over the topside surface of the semiconductor substrate but terminating prior to reaching an edge of the semiconductor substrate so as to form a recessed region along a periphery of the semiconductor substrate. The method also includes forming an interconnect layer extending into the recessed region but terminating prior to reaching an edge of the semiconductor substrate. The interconnect layer electrically contacts the topside surface of the semiconductor substrate in the recessed region to thereby provide a topside contact to the semiconductor substrate.