The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2013
Filed:
Oct. 18, 2011
John S. Austin, Winooski, VT (US);
Kai D. Feng, Hopewell Junction, NY (US);
Shiu Chung Ho, Essex Junction, VT (US);
Zhenrong Jin, Essex Junction, VT (US);
John S. Austin, Winooski, VT (US);
Kai D. Feng, Hopewell Junction, NY (US);
Shiu Chung Ho, Essex Junction, VT (US);
Zhenrong Jin, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A phase lock loop (PLL) includes a PLL feedback circuit having a feedback divider. The feedback divider has a first dynamic latch, a first logic circuit, and a plurality of serially connected dynamic latches. Each of the serially connected dynamic latches receives and forwards additional data signals to subsequent ones of the serially connected dynamic latches in series. The second-to-last dynamic latch in the series outputs a fourth data signal to a last dynamic latch in the series. The last dynamic latch receives the fourth data signal and outputs a fifth data signal. A first feedback loop receives the fourth data signal from the second-to-last dynamic latch and the fifth data signal from the last dynamic latch. The first feedback loop comprises a NAND circuit that combines the fourth and fifth data signals and the first feedback loop outputs the first feedback signal.