The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2013
Filed:
Jan. 24, 2012
Arthur Nieuwoudt, San Francisco, CA (US);
Jiyoun Kim, Suwon, KR;
Mathew Koshy, San Mateo, CA (US);
Baribrata Biswas, San Jose, CA (US);
Arthur Nieuwoudt, San Francisco, CA (US);
Jiyoun Kim, Suwon, KR;
Mathew Koshy, San Mateo, CA (US);
Baribrata Biswas, San Jose, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A technology specific information to design the integrated circuit is received. A plurality of canonical hierarchical models to capture an integrated circuit capacitance are created. The plurality of canonical hierarchical models includes at least a canonical model to capture a capacitance of a device having a plurality of conductors, and a canonical model to capture a capacitance between at least a portion of the device and one or more other conductors of the integrated circuit. The canonical hierarchical models can be applied to a layout of the integrated circuit. A capacitance for the layout can be determined based on the canonical hierarchical models.