The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2013

Filed:

Oct. 11, 2006
Applicants:

Martin G. Dixon, Portland, OR (US);

Scott D. Rodgers, Hillsboro, OR (US);

James P. Held, Portland, OR (US);

Bill Alexander, Hillsboro, OR (US);

Larry O. Smith, Beaverton, OR (US);

Scott H. Robinson, Portland, OR (US);

Sham M. Datta, Hillsboro, OR (US);

Inventors:

Martin G. Dixon, Portland, OR (US);

Scott D. Rodgers, Hillsboro, OR (US);

James P. Held, Portland, OR (US);

Bill Alexander, Hillsboro, OR (US);

Larry O. Smith, Beaverton, OR (US);

Scott H. Robinson, Portland, OR (US);

Sham M. Datta, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In an embodiment, memory access requests for information stored within a system memory pass through an integrated circuit. The system memory may include a micro-architectural memory region to store instructions and/or data, where the micro-architectural memory region is to be exclusively accessible by a micro-architectural agent The integrated circuit may include memory access director to direct memory access requests to the micro-architectural memory region if the memory access director determines that the memory access request includes a location within the at least one micro-architectural memory region and the micro-architectural agent is operating in a micro-architectural memory region access mode.


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