The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2013

Filed:

Jul. 07, 2010
Applicants:

Jaehun Jeong, Hwaseong-si, KR;

Ju-young Lim, Seoul, KR;

Hansoo Kim, Suwon-si, KR;

Jaehoon Jang, Seongnam-si, KR;

Sunil Shim, Seoul, KR;

Jae-joo Shim, Suwon-si, KR;

Inventors:

Jaehun Jeong, Hwaseong-si, KR;

Ju-Young Lim, Seoul, KR;

Hansoo Kim, Suwon-si, KR;

Jaehoon Jang, Seongnam-si, KR;

Sunil Shim, Seoul, KR;

Jae-Joo Shim, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes stacked-gate structures including a plurality of cell gate patterns and insulating patterns alternately stacked on a semiconductor substrate and extending in a first direction. Active patterns and gate dielectric patterns are disposed in the stacked-gate structures. The active patterns penetrate the stacked-gate structures and are spaced apart from each other in a second direction intersecting the first direction, and the gate dielectric patterns are interposed between the cell gate patterns and the active patterns and extend onto upper and lower surfaces of the cell gate patterns. The active patterns share the cell gate patterns in the stacked-gate structures.


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Quick Actions:

Jeong, Jaehun. (2013). Semiconductor device and method of forming the same (U.S. Patent No. 8519472). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8519472

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