The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2013
Filed:
Feb. 18, 2010
James M. Paris, Portland, OR (US);
William M. Hogan, Lake Oswego, OR (US);
John G. Ferguson, Tualatin, OR (US);
James M. Paris, Portland, OR (US);
William M. Hogan, Lake Oswego, OR (US);
John G. Ferguson, Tualatin, OR (US);
Mentor Graphics Corporation, Wilsonville, OR (US);
Abstract
A collaborative environment for performing physical verification processes on integrated circuit designs. Multiple physical verification results may be stored in a 'unified' results database/directory (e.g., unified at least from a user's perspective), where results from various verification processes, such as Design-Rule-Check (DRC) processes, Layout-Versus-Schematic comparison (LVS) processes, Design-For-Manufacturing (DFM) processes Optical Proximity Correction (OPC) processes, and Optical Rule Check (ORC) processes are accessible from the same style of user interface, which may be a graphical user interface. The basic abilities for design team-based interactions can be equally available to each process involved in the physical verification of an integrated circuit design.