The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2013

Filed:

Apr. 01, 2005
Applicants:

Ken Wadland, Grafton, MA (US);

Richard Allen Woodward, Jr., San Diego, CA (US);

Randall Lawson, Westford, MA (US);

Alan G Strelzoff, Boxford, MA (US);

David Tsai, Windham, NH (US);

Steve Russo, Holden, MA (US);

Inventors:

Ken Wadland, Grafton, MA (US);

Richard Allen Woodward, Jr., San Diego, CA (US);

Randall Lawson, Westford, MA (US);

Alan G Strelzoff, Boxford, MA (US);

David Tsai, Windham, NH (US);

Steve Russo, Holden, MA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for auto-routing wiring within a PCB. In some embodiment, a first broad region within a first layer and a counterpart first broad region within a second layer are defined. The counterpart regions define a first broad via location. In some embodiments, the first and second broad via locations of the first and second layers can then be subdivided into a plurality of triangular regions. The triangular regions on the first and second layers can then be compared to more accurately locate an appropriate via location.


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