The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2013

Filed:

Feb. 09, 2012
Applicants:

Ronald P. Cocchi, Seal Beach, CA (US);

Lap Wai Chow, South Pasadena, CA (US);

James P. Baukus, Westlake Village, CA (US);

Bryan J. Wang, South Lake Tahoe, CA (US);

Inventors:

Ronald P. Cocchi, Seal Beach, CA (US);

Lap Wai Chow, South Pasadena, CA (US);

James P. Baukus, Westlake Village, CA (US);

Bryan J. Wang, South Lake Tahoe, CA (US);

Assignee:

SypherMedia International, Inc., Westminster, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus for camouflaging an application specific integrated circuit (ASIC), wherein the ASIC comprises a plurality of interconnected functional logic is disclosed. The method adds functionally inert elements to the logical description or provides alternative definitions of standard logical cells to make it difficult for reverse engineering programs to be used to discover the circuit's function. Additionally, post processing may be performed on GDS layers to provide a realistic fill of the empty space so as to resemble structural elements found in a functional circuit.


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