The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2013
Filed:
Sep. 15, 2010
Applicants:
Fujio Masuoka, Tokyo, JP;
Shintaro Arai, Tokyo, JP;
Inventors:
Fujio Masuoka, Tokyo, JP;
Shintaro Arai, Tokyo, JP;
Assignee:
Unisantis Electronics Singapore Pte Ltd., Singapore, SG;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
Abstract
In a static memory cell configured using four MOS transistors and two load resistance elements, the MOS transistors are formed on diffusion layers formed on a substrate. The diffusion layers serve as memory nodes. The drain, gate and source of the MOS transistors are arranged in the direction orthogonal to the substrate, and the gate surrounds a columnar semiconductor layer. In addition, the load resistance elements are formed by contact plugs. In this way, it is possible to form a SRAM cell with a small area.