The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2013
Filed:
Jul. 30, 2010
Chikang Liu, Shanghai, CN;
Zhengying Wei, Shanghai, CN;
Guoxu Zhao, Shanghai, CN;
Yangfeng LI, Shanghai, CN;
Guoliang Zhu, Shanghai, CN;
Fangyu Yang, Shanghai, CN;
ChiKang Liu, Shanghai, CN;
ZhengYing Wei, Shanghai, CN;
GuoXu Zhao, Shanghai, CN;
YangFeng Li, Shanghai, CN;
GuoLiang Zhu, Shanghai, CN;
FangYu Yang, Shanghai, CN;
Abstract
A high voltage integrated circuit device includes a semiconductor substrate having a surface region with a contact region, which is coupled to a source/drain region. The device has a plasma enhanced oxide overlying the surface region, a stop layer overlying the plasma enhanced oxide, and a contact opening through a portion of the stop layer and through a portion of the plasma enhanced oxide layer. The contact opening exposes a portion of the contact region without damaging it. The device has a silicide layer overlying the contact region to form a silicided contact region and an interlayer dielectric overlying the silicided contact region to fill the contact opening and provide a thickness of material overlying the stop layer. An opening in the interlayer dielectric layer is formed through a portion of the thickness to expose a portion of the silicided contact region and expose a portion of the stop layer.