The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2013

Filed:

Jan. 05, 2011
Applicants:

Fabrice Letertre, Meylan, FR;

Bruno Ghyselen, Seyssinet, FR;

Pierre Rayssac, Grenoble, FR;

Gisèle Rayssac, Grenoble, FR;

Inventors:

Fabrice Letertre, Meylan, FR;

Bruno Ghyselen, Seyssinet, FR;

Olivier Rayssac, Grenoble, FR;

Assignee:

Soitec, Bernin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention relates to methods for fabricating a semiconductor substrate. In one embodiment, the method includes transferring a seed layer on to a support substrate; and depositing a working layer on the seed layer to form a composite substrate. The seed layer is made of a material that accommodates thermal expansion of the support substrate and of the working layer. In another embodiment, the method includes providing a source substrate with a weakened zone defining a nucleation layer, bonding a support substrate to the source substrate, detaching the nucleation layer and support substrate at the weakened zone by applying laser irradiation stress, depositing a semiconductor material upon the nucleation layer, bonding a target substrate to the deposited layer and removing the support substrate and nucleation layer. The result is a semiconductor substrate that includes the layer of semiconductor material on a support or target substrate.


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