The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2013
Filed:
Sep. 30, 2010
Hung-yi Liu, Pingzhen, TW;
Chung-hsing Wang, Baoshan Township, TW;
Yung-chin Hou, Taipei, TW;
Lie-szu Juang, Saratoga, CA (US);
Hung-Yi Liu, Pingzhen, TW;
Chung-Hsing Wang, Baoshan Township, TW;
Yung-Chin Hou, Taipei, TW;
Lie-Szu Juang, Saratoga, CA (US);
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method of designing integrated circuits includes providing a design of an integrated circuit at a first scale, wherein the integrated circuit includes a shrinkable circuit including a first intellectual property (IP); and a non-shrinkable circuit including a second IP having a hierarchical structure. A marker layer is formed to cover the non-shrinkable circuit, wherein the shrinkable circuit is not covered by the marker layer. The electrical performance of the non-shrinkable circuit is simulated using a simulation tool, wherein the simulated non-shrinkable circuit is at a second scale smaller than the first scale.