The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2013

Filed:

Jun. 06, 2011
Applicants:

Sanghyun Lee, Davis, CA (US);

Mohan Dunga, Santa Clara, CA (US);

Masaaki Higashitani, Cupertino, CA (US);

Tuan Pham, San Jose, CA (US);

Franz Kreupl, Munich, DE;

Inventors:

Sanghyun Lee, Davis, CA (US);

Mohan Dunga, Santa Clara, CA (US);

Masaaki Higashitani, Cupertino, CA (US);

Tuan Pham, San Jose, CA (US);

Franz Kreupl, Munich, DE;

Assignee:

SanDisk Technologies Inc., Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/04 (2006.01); H01L 29/94 (2006.01); H01L 21/00 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
Abstract

Non-volatile storage elements having a P−/metal floating gate are disclosed herein. The floating gate may have a P− region near the tunnel oxide, and may have a metal region near the control gate. A P− region near the tunnel oxide helps provide good data retention. A metal region near the control gate helps to achieve a good coupling ratio between the control gate and floating gate. Therefore, programming of non-volatile storage elements is efficient. Also, erasing the non-volatile storage elements may be efficient. In some embodiments, having a P− region near the tunnel oxide (as opposed to a strongly doped p-type semiconductor) may improve erase efficiency relative to P+.


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