The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2013
Filed:
Feb. 10, 2010
Lew Chua-eoan, San Diego, CA (US);
Boris Andreev, San Diego, CA (US);
Christopher Phan, San Diego, CA (US);
Amirali Shayan, San Diego, CA (US);
Xiaohua Kong, San Diego, CA (US);
Mikhail Popovich, San Diego, CA (US);
Mauricio Calle, San Diego, CA (US);
Ik-joon Chang, San Diego, CA (US);
Lew Chua-Eoan, San Diego, CA (US);
Boris Andreev, San Diego, CA (US);
Christopher Phan, San Diego, CA (US);
Amirali Shayan, San Diego, CA (US);
Xiaohua Kong, San Diego, CA (US);
Mikhail Popovich, San Diego, CA (US);
Mauricio Calle, San Diego, CA (US);
IK-Joon Chang, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
An on-chip sensor measures dynamic power supply noise, such as voltage droop, on a semiconductor chip. In-situ logic is employed, which is sensitive to noise present on the power supply of functional logic of the chip. Exemplary functional logic includes a microprocessor, adder, and/or other functional logic of the chip. The in-situ logic performs some operation, and the amount of time required for performing that operation (i.e., the operational delay) is sensitive to noise present on the power supply. Thus, by evaluating the operational delay of the in-situ logic, the amount of noise present on the power supply can be measured.