The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2013

Filed:

Aug. 28, 2012
Applicants:

Jong-hoon Kang, Seoul, KR;

Bong-jin Kuh, Suwon-si, KR;

Tae-gon Kim, Seoul, KR;

Han-mei Choi, Seoul, KR;

Ki-chul Kim, Seongnam-si, KR;

Eun-young JO, Seoul, KR;

Inventors:

Jong-Hoon Kang, Seoul, KR;

Bong-Jin Kuh, Suwon-si, KR;

Tae-Gon Kim, Seoul, KR;

Han-Mei Choi, Seoul, KR;

Ki-Chul Kim, Seongnam-si, KR;

Eun-Young Jo, Seoul, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A thin layer structure includes a substrate, a blocking pattern that exposes part of an upper surface of the substrate, and a single crystalline semiconductor layer on the part of the upper surface of the substrate exposed by the pattern and in which all outer surfaces of the single crystalline semiconductor layer have a <100> crystallographic orientation. The thin layer structure is formed by an SEG process in which the temperature is controlled to prevent migration of atoms in directions towards the central portion of the upper surface of the substrate. Thus, sidewall surfaces of the layer will not be constituted by facets.


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