The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2013
Filed:
Jan. 20, 2012
David E. Lackey, Jericho, VT (US);
Chandramouili Visweswariah, Croton-on-Hudson, NY (US);
Paul S. Zuchowski, Jericho, VT (US);
David E. Lackey, Jericho, VT (US);
Chandramouili Visweswariah, Croton-on-Hudson, NY (US);
Paul S. Zuchowski, Jericho, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, system, and integrated circuit including selectively added timing margin. The method, for integrating statistical timing and automatic test pattern generation (ATPG) to selectively add timing margin in an integrated circuit, includes identifying, while a chip is in design, paths that are unable to be robustly tested 'at speed' during manufacturing test, running statistical timing to calculate a margin to be applied to the paths, updating design specifications for margin to be applied to the paths, and optimizing chip logic based on updated design specifications.