The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2013

Filed:

Nov. 23, 2010
Applicants:

Andrew Y. Sun, Cupertino, CA (US);

Henk G. Neefs, Santa Clara, CA (US);

Rahul Pal, Bangalore, IN;

Manoj K. Arora, Bangalore, IN;

Ravindra P. Saraf, Amaravati, IN;

Inventors:

Andrew Y. Sun, Cupertino, CA (US);

Henk G. Neefs, Santa Clara, CA (US);

Rahul Pal, Bangalore, IN;

Manoj K. Arora, Bangalore, IN;

Ravindra P. Saraf, Amaravati, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, the present invention includes a processor having at least one core and uncore logic. The uncore logic can include a home agent to act as a guard to control access to a memory region. Either in the home agent or another portion of the uncore logic, a directory cache may be provided to store ownership information for a portion of the memory region owned by an agent coupled to the processor. In this way, when an access request for the memory region misses in the directory cache, a memory transaction can be avoided. Other embodiments are described and claimed.


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