The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2013
Filed:
Oct. 13, 2011
Ping Huang, Songjiang, CN;
Ruisheng Wu, Songjiang, CN;
Lei Duan, Songjiang, CN;
Yi Chen, Songjiang, CN;
Yuping Gong, Songjiang, CN;
Ping Huang, Songjiang, CN;
Ruisheng Wu, Songjiang, CN;
Lei Duan, Songjiang, CN;
Yi Chen, Songjiang, CN;
Yuping Gong, Songjiang, CN;
Alpha & Omega Semiconductor, Inc., Sunnyvale, CA (US);
Abstract
A chip-scale packaging method, with bottom and side of a semiconductor chip encapsulated, includes the following steps: attaching backside of a thinned semiconductor wafer to a dicing tape; separating individual chips by cutting from front side of the wafer at scribe line but not cut through the dicing tape; flipping and attaching the wafer onto a top surface of a double-sided tape, then removing the dicing tape; attaching bottom surface of the double-sided tape on a supporting plate; filling the space between adjacent chips and covering the whole wafer backside with a molding material; flipping the whole structure and remove the supporting plate; placing solder balls at corresponding positions on electrodes of each chip and performing backflow treatment; finally separating individual chip packages by cutting through molding material at the space between adjacent chip packages with molding material encapsulating the bottom and side of each individual semiconductor chip.