The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2013

Filed:

Jun. 01, 2012
Applicants:

Yutaka Hoshino, Akishima, JP;

Shuji Ikeda, Koganei, JP;

Isao Yoshida, Hinode, JP;

Shiro Kamohara, Hachiouji, JP;

Megumi Kawakami, Kokubunji, JP;

Tomoyuki Miyake, Higashimurayama, JP;

Masatoshi Morikawa, Hannou, JP;

Inventors:

Yutaka Hoshino, Akishima, JP;

Shuji Ikeda, Koganei, JP;

Isao Yoshida, Hinode, JP;

Shiro Kamohara, Hachiouji, JP;

Megumi Kawakami, Kokubunji, JP;

Tomoyuki Miyake, Higashimurayama, JP;

Masatoshi Morikawa, Hannou, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2006.01); H01L 31/113 (2006.01); H01L 31/119 (2006.01); H01L 27/10 (2006.01); H01L 29/74 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs(P) for leading out electrodes on a source region, a drain regionand leach-through layers(), to which a first layer wirings(M) are connected and, further, backing second layer wiringstoare connected on the conductor plugs(P) to the first layer wirings(M).


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