The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2013
Filed:
Aug. 08, 2011
Yong-hoon Son, Gyeonggi-do, KR;
Yu-gyun Shin, Gyeonggi-do, KR;
Jong-wook Lee, Gyeonggi-do, KR;
Sun-ghil Lee, Gyeonggi-do, KR;
In-soo Jung, Gyeonggi-do, KR;
Young-eun Lee, Gyeonggi-do, KR;
Deok-hyung Lee, Gyeonggi-do, KR;
Yong-Hoon Son, Gyeonggi-do, KR;
Yu-Gyun Shin, Gyeonggi-do, KR;
Jong-Wook Lee, Gyeonggi-do, KR;
Sun-Ghil Lee, Gyeonggi-do, KR;
In-Soo Jung, Gyeonggi-do, KR;
Young-Eun Lee, Gyeonggi-do, KR;
Deok-Hyung Lee, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;
Abstract
A semiconductor device includes an inorganic insulating layer on a semiconductor substrate, a contact plug that extends through the inorganic insulating layer to contact the semiconductor substrate and a stress buffer spacer disposed between the node contact plug and the inorganic insulating layer. The device further includes a thin-film transistor (TFT) disposed on the inorganic insulating layer and having a source/drain region extending along the inorganic insulating layer to contact the contact plug. The device may further include an etch stop layer interposed between the inorganic insulating layer and the semiconductor substrate.