The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2013
Filed:
Jun. 17, 2010
Chao-i Wu, Zhubei, TW;
Tzu-hsuan Hsu, Shanmen, TW;
Hang-ting Lue, Hsinchu, TW;
Erh-kun Lai, Longjing Shiang Taichung County, TW;
Chao-I Wu, Zhubei, TW;
Tzu-Hsuan Hsu, Shanmen, TW;
Hang-Ting Lue, Hsinchu, TW;
Erh-Kun Lai, Longjing Shiang Taichung County, TW;
Macronix International Co., Ltd., Hsinchu, TW;
Abstract
A non-volatile memory cell may include a semiconductor substrate; a source region in a portion of the substrate; a drain region within a portion of the substrate; a well region within a portion of the substrate. The memory cell may further include a first carrier tunneling layer over the substrate; a charge storage layer over the first carrier tunneling layer; a second carrier tunneling layer over the charge storage layer; and a conductive control gate over the second carrier tunneling layer. Specifically, the drain region is spaced apart from the source region, and the well region may surround at least a portion of the source and drain regions. In one example, the second carrier tunneling layer provides hole tunneling during an erasing operation and may include at least one dielectric layer.