The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2013

Filed:

Jan. 27, 2010
Applicants:

Michael J. Gaboury, Burnsville, MN (US);

Gregory J. Rausch, Minnetonka, MN (US);

Shohei Osaka, Saitama, JP;

Inventors:

Michael J. Gaboury, Burnsville, MN (US);

Gregory J. Rausch, Minnetonka, MN (US);

Shohei Osaka, Saitama, JP;

Assignee:

Polar Semiconductor, Inc., Bloomington, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/70 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of controlling a power factor correction (PFC) converter having a first PFC sub-circuit and a second PFC sub-circuit determines when to transition the PFC converter between an interleaved mode and a saving energy mode (SEM). The method includes generating an amplified error signal based on a monitored output voltage of the PFC converter. The second PFC sub-circuit is disabled in response to the amplified error signal being less than a first threshold value and enabled in response to the amplified error signal exceeding a second threshold value.


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