The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2013

Filed:

Feb. 02, 2010
Applicants:

Qi Lin, Los Altos Hills, CA (US);

Liang Peng, San Jose, CA (US);

Craig E. Hampel, Los Altos, CA (US);

Thomas J. Sheffler, San Francisco, CA (US);

Steven C. Woo, Saratoga, CA (US);

Bohuslav Rychlik, San Diego, CA (US);

Inventors:

Qi Lin, Los Altos Hills, CA (US);

Liang Peng, San Jose, CA (US);

Craig E. Hampel, Los Altos, CA (US);

Thomas J. Sheffler, San Francisco, CA (US);

Steven C. Woo, Saratoga, CA (US);

Bohuslav Rychlik, San Diego, CA (US);

Assignee:

Rambus Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A cache-coherence protocol distributes atomic operations among multiple processors (or processor cores) that share a memory space. When an atomic operation that includes an instruction to modify data stored in the shared memory space is directed to a first processor that does not have control over the address(es) associated with the data, the first processor sends a request, including the instruction to modify the data, to a second processor. Then, the second processor, which already has control of the address(es), modifies the data. Moreover, the first processor can immediately proceed to another instruction rather than waiting for the address(es) to become available.


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