Self-identifying stacked die semiconductor components

Abstract

A semiconductor die having a functional circuit (e.g., a memory array) and a decode circuit suitable for use in a stacked die semiconductor component (e.g., a random access memory component) is described. The decode circuit permits individual die in a stacked die structure to automatically determine their location or position in the stack and, in response to this determination, selectively pass one or more external control signals (e.g., chip select and clock enable signals) to the decode circuit's associated functional circuit based on inter-die connection patterns. This 'self-configuring' capability permits all die designated for a specified functionality (e.g., a memory module including four vertically aligned die) to be uniformly or consistently manufactured. This, in turn, can reduce the cost to manufacture stacked die components.