The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2013
Filed:
Apr. 16, 2010
Kangguo Cheng, Guilderland, NY (US);
Louis L. Hsu, Fishkill, NY (US);
William R. Tonti, Essex Junction, VT (US);
Chih-chao Yang, Glenmont, NY (US);
Kangguo Cheng, Guilderland, NY (US);
Louis L. Hsu, Fishkill, NY (US);
William R. Tonti, Essex Junction, VT (US);
Chih-Chao Yang, Glenmont, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Voltage programmable anti-fuse structures and methods are provided that include at least one conductive material island atop a dielectric surface that is located between two adjacent conductive features. In one embodiment, the anti-fuse structure includes a dielectric material having at least two adjacent conductive features embedded therein. At least one conductive material island is located on an upper surface of the dielectric material that is located between the at least two adjacent conductive features. A dielectric capping layer is located on exposed surfaces of the dielectric material, the at least one conductive material island and the at least two adjacent conductive features. When the anti-fuse structure is in a programmed state, a dielectric breakdown path is present in the dielectric material that is located beneath the at least one conductive material island which conducts electrical current to electrically couple the two adjacent conductive features.