The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2013
Filed:
Nov. 24, 2011
Yuichiro Ikeda, Hyogo, JP;
Kazuhiko Shimakawa, Osaka, JP;
Ryotaro Azuma, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
In a nonvolatile memory device, basic array planes (to) have respective first via groups (to) that interconnect only even-layer bit lines in the basic array planes, and respective second via groups (to) that interconnect only odd-layer bit lines in the basic array planes, the first via group in a first basic array plane and the second via group in a second basic array plane adjacent to the first basic array plane in a Y direction are adjacent to each other in the Y direction, and the first via group in the second basic array plane is connected to an unselected-bit-line dedicated global bit line (GBL_NS) having a fixed potential when the first via group in the first basic array plane is connected to a first global bit line related to the first basic array plane.