The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2013

Filed:

Feb. 04, 2011
Applicants:

Michael S. Mazzola, Starkville, MS (US);

Robin Kelley, Columbus, MS (US);

Inventors:

Michael S. Mazzola, Starkville, MS (US);

Robin Kelley, Columbus, MS (US);

Assignee:

Power Integrations, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/56 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for rendering a half-bridge circuit containing normally on switches such as junction field effect transistors (JFETs) inherently safe from uncontrolled current flow is described. The switches can be made from silicon carbide or from silicon. The methods described herein allow for the use of better performing normally on switches in place of normally off switches in integrated power modules thereby improving the efficiency, size, weight, and cost of the integrated power modules. As described herein, a power supply can be added to the gate driver circuitry. The power supply can be self starting and self oscillating while being capable of deriving all of its source energy from the terminals supplying electrical potential to the normally on switch through the gate driver. The terminal characteristics of the normally on switch can then be coordinated to the input-to-output characteristics of the power supply.


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