The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Apr. 01, 2009
Vishal Suthar, San Jose, CA (US);
Hasan Arslan, Santa Clara, CA (US);
Sridhar Krishnamurthy, San Jose, CA (US);
Sanjeev Kwatra, Cupertino, CA (US);
Srinivasan Dasasathyan, Sunnyvale, CA (US);
Rajat Aggarwal, Los Altos, CA (US);
Sudip K. Nag, San Jose, CA (US);
Vishal Suthar, San Jose, CA (US);
Hasan Arslan, Santa Clara, CA (US);
Sridhar Krishnamurthy, San Jose, CA (US);
Sanjeev Kwatra, Cupertino, CA (US);
Srinivasan Dasasathyan, Sunnyvale, CA (US);
Rajat Aggarwal, Los Altos, CA (US);
Sudip K. Nag, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method of implementing a circuit design within a programmable integrated circuit (IC) can include identifying an implementation directive embedded within a register transfer level (RTL) description of the circuit design and determining components of a sub-circuit of the circuit design, wherein the sub-circuit is specified by a portion of the RTL description associated with the implementation directive. The sub-circuit can be placed for the programmable IC and routed for the programmable IC according to the implementation directive. A programmatic description of the sub-circuit specifying placement and routing information can be output.