The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Nov. 01, 2006
Applicants:
Vicky P. Duerk, Shrewsbury, MA (US);
Pak-lung Seto, Shrewsbury, MA (US);
Inventors:
Vicky P. Duerk, Shrewsbury, MA (US);
Pak-Lung Seto, Shrewsbury, MA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/16 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
Abstract
Link level load balancing is provided based on time utilization of a link or workload utilization of a device. Time utilization achieves load balancing by giving each device the same amount of connection time to perform Input/Output tasks. Workload utilization achieves load balancing by managing a number of frames or bytes transmitted to each device.