The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
May. 06, 2011
Kyung-sook Jeon, Yongin-si, KR;
Jun-ho Song, Seongnam-si, KR;
Sang-youn Han, Seoul, KR;
Sung-hoon Yang, Seoul, KR;
Dae-cheol Kim, Hwaseong-si, KR;
Ki-hun Jeong, Cheonan-si, KR;
Mi-seon Seo, Seoul, KR;
Kyung-Sook Jeon, Yongin-si, KR;
Jun-Ho Song, Seongnam-si, KR;
Sang-Youn Han, Seoul, KR;
Sung-Hoon Yang, Seoul, KR;
Dae-Cheol Kim, Hwaseong-si, KR;
Ki-Hun Jeong, Cheonan-si, KR;
Mi-Seon Seo, Seoul, KR;
Samsung Display Co., Ltd., Yongin, KR;
Abstract
Provided are a sensor array substrate and a method of fabricating the same. The sensor array substrate includes: a substrate in which a switching element region and a sensor region that senses light are defined; a first semiconductor layer which is formed in the sensor region; a first gate electrode which is formed on the first semiconductor layer and overlaps the first semiconductor layer; a second gate electrode which is formed in the switching element region; a second semiconductor layer which is formed on the second gate electrode and overlaps the second gate electrode; and a light-blocking pattern which is formed on the second semiconductor layer and overlaps the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer are disposed on different layers, and the second gate electrode and the light-blocking pattern are electrically connected to each other.