The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2013
Filed:
Mar. 25, 2011
Applicants:
Hing (Thomas) Yan to, Cupertino, CA (US);
Gregory Lemos, Folsom, CA (US);
Inventors:
Hing (Thomas) Yan To, Cupertino, CA (US);
Gregory Lemos, Folsom, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract
Disparate clock domains are resynchronized after circuits in one of the clock domains awake from a reduced power state. Parallel test data is routed from a core circuit to a parallel-to-serial converter in an input/output (I/O) circuit. The parallel-to-serial converter clocks the parallel test data in response to a load signal. The load signal is varied until the clock domains are synchronized.
To, Hing (Thomas). (2013). Disparate clock domain synchronization (U.S. Patent No. 8442075). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8442075
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile