Non-volatile memory device with controlled discharge

Abstract

An electrically programmable non-volatile memory device being integrated on a chip of semiconductor material is proposed. The memory device includes a plurality of sectors of memory cells each one being formed in a respective well of the chip; each sector includes a plurality word lines each one for accessing a corresponding block of memory cells of the sector; the memory device includes a first biasing line of the wells and a second biasing line of the word lines, biasing circuitry for providing a first bias voltage to the first biasing line and a second bias voltage to the second biasing line, selection circuitry for selectively connecting the first biasing line to the well of at least one selected sector and for selectively connecting the second biasing line to at least one selected word line of each selected sector, first charge transfer circuitry for bringing the first biasing line from the first bias voltage to a target voltage according to a pilot transient trend, the target voltage being between the first bias voltage and the second bias voltage, second charge transfer circuitry for bringing the second biasing line from the second bias voltage to the target voltage. The second charge transfer circuitry includes circuitry for binding the second biasing line to bring itself from the second bias voltage to the target voltage according to a transient trend being scaled with respect to the pilot transient trend.