The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8441241 B1

PDF
Full Text
Expired
Date of Patent:
May. 14, 2013

Filed:

May. 03, 2010
Applicants:

Harish K. Krishnamurthy, Hillsboro, OR (US);

Annabelle Pratt, Hillsboro, OR (US);

Gene Frederiksen, Hillsboro, OR (US);

Krishnan Ravichandran, Saratoga, CA (US);

Inventors:

Harish K. Krishnamurthy, Hillsboro, OR (US);

Annabelle Pratt, Hillsboro, OR (US);

Gene Frederiksen, Hillsboro, OR (US);

Krishnan Ravichandran, Saratoga, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and systems to generate a digital error indication of an input signal relative to a reference signal, using resistors, comparators, and latches. The digital error indication may indicate that the input signal is within a range of the reference signal, above the range, or below the range. The methods and systems may be implemented within a multi-phase digital voltage regulator to generate a digital error indication for each of a plurality of phase currents relative to an instantaneous average of the phase currents. The digital voltage regulator may be fabricated on an integrated circuit die with a corresponding load, such as a processor. The digital voltage regulator may include a plurality of multiplier or look-up based gain modules, each to receive a corresponding one of the digital error signals and to output one of three values. Outputs of each gain module may be integrated over time.


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