The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2013
Filed:
Jun. 27, 2011
Naomi Fukumaki, Kanagawa, JP;
Eiji Hasegawa, Kanagawa, JP;
Toshihiro Iizuka, Kanagawa, JP;
Ichiro Yamamoto, Kanagawa, JP;
Naomi Fukumaki, Kanagawa, JP;
Eiji Hasegawa, Kanagawa, JP;
Toshihiro Iizuka, Kanagawa, JP;
Ichiro Yamamoto, Kanagawa, JP;
Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;
Abstract
A method of manufacturing a semiconductor device having a p-type field effect transistor and an n-type field effect transistor includes the steps of: forming an interface insulating layer and a high-permittivity layer on a substrate in the stated order; forming a pattern of a sacrifice layer on the high-permittivity layer; forming a metal-containing film containing metal elements therein on the high-permittivity layer in a first region where the sacrifice layer is formed and a second region where no sacrifice layer is formed; introducing the metal elements into an interface between the interface insulating layer and the high-permittivity layer in the second region by conducting a heat treatment; and removing the sacrifice layer by wet etching, wherein in the removing step, the sacrifice layer is etched easily more than the high-permittivity layer. With this configuration, the semiconductor device excellent in reliability is obtained.