Structures and control processes for efficient generation of different test clocking sequences, controls and other test signals in scan designs with multiple partitions, and devices, systems and processes of making

Abstract

A scannable integrated circuit () including a functional integrated circuit (P, P) having scan chains, multiple scan decompressors (), each operable to supply scan bits to some of the scan chains (), a shared scan-programmable control circuit (), a tree circuit () coupled with the functional integrated circuit (P, P), the shared scan-programmable control circuit () coupled to control the tree circuit (), and a selective coupling circuit () operable to provide selective coupling with the shared scan-programmable control circuit () for scan programming through any of the multiple scan decompressors (). Other circuits, devices, systems, and processes of operation and manufacture are disclosed.