The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2013
Filed:
Jun. 30, 2010
Kazunari Nakata, Chiyoda-ku, JP;
Kaoru Motonami, Chiyoda-ku, JP;
Atsushi Narazaki, Chiyoda-ku, JP;
Ayumu Onoyama, Chiyoda-ku, JP;
Shigeto Honda, Chiyoda-ku, JP;
Ryoichi Fujii, Chiyoda-ku, JP;
Tomoya Hirata, Chiyoda-ku, JP;
Kazunari Nakata, Chiyoda-ku, JP;
Kaoru Motonami, Chiyoda-ku, JP;
Atsushi Narazaki, Chiyoda-ku, JP;
Ayumu Onoyama, Chiyoda-ku, JP;
Shigeto Honda, Chiyoda-ku, JP;
Ryoichi Fujii, Chiyoda-ku, JP;
Tomoya Hirata, Chiyoda-ku, JP;
Mitsubishi Electric Corporation, Tokyo, JP;
Abstract
A passivation film having a predetermined width from an outer peripheral end portion toward an inner side and extending along the outer peripheral end portion is formed on a front surface of a semiconductor substrate. An outer peripheral end surface orthogonal to the front surface and a rear surface is formed by grinding the outer peripheral end portion of the semiconductor substrate. A thickness of the semiconductor substrate is reduced to a predetermined thickness by grinding the rear surface. The ground rear surface is etched by discharging a mixed acid onto the rear surface while rotating the semiconductor substrate with the rear surface facing upward, to remove a fracture layer. Thereby, chipping or cracking of the semiconductor substrate is suppressed.